Datenbestand vom 15. November 2024
Tel: 0175 / 9263392 Mo - Fr, 9 - 12 Uhr
Impressum Fax: 089 / 66060799
aktualisiert am 15. November 2024
978-3-8439-2152-7, Reihe Elektrotechnik
Zhihao Pan Modeling and optimization of discrete ESD protection devices
188 Seiten, Dissertation Technische Universität Hamburg-Harburg (2015), Softcover, A5
Discrete ESD protection devices based on silicon are widely used on printed circuit boards (PCBs) to ensure that the electronic system is not endangered by the likely electrostatic discharge (ESD) event during its lifetime in the end-user environment. The protection device operates under high current injection during the ESD stress. Effects such as self-heating, inhomogeneous current distribution and current constriction become important, which make the prediction of the device’s ESD robustness very difficult. In addition, discrete ESD protection devices must fulfill other stringent requirements, such as low capacitances, low clamping voltages and small package sizes, which makes it even more challenging to develop the product “first time right”.
Technology Computer Aided Design (TCAD) tools have been widely used to assist the development of semiconductor devices for a long time. Recently, simulations have also been used to evaluate ESD protection device. However, in most cases, they are only used to help understand the behavior of the device under ESD stress rather than give accurate predictions of the key device parameters, as it is doubtful whether the underlying physical models are still valid at very high temperatures.
In order to examine the feasibility of using TCAD as a predictive simulation tool for ESD protection devices, the properties of various silicon devices have been examined experimentally using Transmission Line Pulses (TLPs) and system level ESD robustness tests. The results are compared to simulations in this thesis. It is found that measured transient voltages, failure levels and locations of almost all devices can be well reproduced by simulations once the impact-ionization model is calibrated and the correct failure criterion is used for the transient electro-thermal simulation. Optimization of key parameters of ESD protection devices, such as capacitances and clamping voltages is discussed. A special focus is given on the overshoot voltage observed at the beginning of the fast transient. It is demonstrated that the existing model fails to correctly predict the overshoot voltage of a diode. A new model is proposed in this thesis, which shows a much better agreement. Furthermore, novel concepts of ESD protection devices based on vertical Silicon Controlled Rectifiers (SCRs) are evaluated with simulations. It is thought that the new devices are suitable for ESD protection of high-speed interfaces in the future.