ISBN 978-3-8439-2393-4

978-3-8439-2393-4, Reihe Elektrotechnik

Andrea Cattaneo
A Physically Based Reliability Modelling Framework for nm-CMOS RF Devices and Circuits undergoing RF Stress

182 Seiten, Dissertation Universität Erlangen-Nürnberg (2015), Softcover, A5

Zusammenfassung / Abstract

Complementary Metal-Oxide-Semiconductor (CMOS) technology has acquired increased interest in recent years for being deployed in wireless applications due to the favourable trade-off between cost and performance. In fact, scaled nm-technology nodes boost the offered DC and RF performance with the limitation of being operated at low voltage. This is desired for logic operations since it is possible to reduce the power consumption and the deployed silicon area at the same time. Nevertheless, the transmitting front-end of wireless systems require the handling of large voltage signals resulting in the necessity of operating the transistors beyond the Nominal Recommended Voltage (Vnom). As a general rule of thumb proposed by several research groups, RF voltage peaks reaching 2Vnom could be tolerated by MOSFETs. Nevertheless, especially for recent scaled technology nodes a more quantitative voltage limitation has to be developed. In fact, this simplified guideline has proven to lead to an incorrect estimation of the transistors lifetime and the resultant reliability issues could indeed become the bottleneck in order to implement all electronics of wireless mobile applications into a monolithic integrated CMOS chip. The implementation of such a System on Chip (SoC) should therefore depend on a thorough reliability modelling and evaluation.