Datenbestand vom 10. Dezember 2024

Impressum Warenkorb Datenschutzhinweis Dissertationsdruck Dissertationsverlag Institutsreihen     Preisrechner

aktualisiert am 10. Dezember 2024

ISBN 9783843910521

72,00 € inkl. MwSt, zzgl. Versand


978-3-8439-1052-1, Reihe Informatik

Stefan Stattelmann
Source-Level Performance Estimation of Compiler-Optimized Embedded Software Considering Complex Program Transformations

158 Seiten, Dissertation Eberhard-Karls-Universität Tübingen (2012), Softcover, A5

Zusammenfassung / Abstract

The complexity of embedded systems is continuously growing due to a steady increase in chip manufacturing capabilities and advancing customer demands. Simultaneously, an increasing portion of the functionality is implemented in software instead of hardware. Especially in multi-core systems, the interaction of software components does have a significant effect on their execution time. Hence, to estimate their performance precisely during system development, considering a single software component in isolation is insufficient. To overcome this issue, a simulation-based performance evaluation can be conducted. A standard technique to improve the simulation performance of virtual prototypes is transaction-level modeling, which separates the modeling of communication and computation. In transaction-level models, low-level timing properties are often added to the source code of software components to perform a timed simulation. As the binary code is what determines these properties, adding timing annotations requires an accurate relation between the source code and the binary code of a program.

This dissertation proposes several novel concepts to overcome the limitations of the simulation- based performance evaluation using source-level timing annotations. The proposed annotation work flow analyzes, reconstructs and disambiguates compiler-generated debugging information to establish an accurate relation between the source code of a program and its machine code by comparing the structure of both program representations. Based on the resulting structural relationship, low-level timing properties obtained through a static analysis of the target machine code are annotated to the source code of the program. Unlike previous approaches for source-level timing simulation, execution times of binary-level basic blocks are not annotated directly into the source code. Instead, the binary-level control flow is reconstructed, allowing a dynamic selection of timing annotations. By simulating binary-level control flow in parallel to the original functionality of the software, even compiler optimizations heavily modifying the structure of the generated code can be modeled accurately.